Text Area


  • M. Lastras-Monta, O.D. Pozo-Zamudio, L. Glebsky, M. Zhao, H. Wu, and K.-T. Cheng, “Ratio-based Multi-level Resistive Memory Cells”, in Scientific Reports, January 2021.
  • M. Angel Lastras-Montano, and K. -T. Cheng, "Resistive Random-access Memory based on Ratioed Memristors", Nature Electronics, 2018.
  • K.-T. Cheng, N. Gong, and M. A. Lastras-Montaño, "Variability in emerging memory devices and solutions," in Section 8 of Roadmap paper Roadmap on Emerging Hardware and Technology for Machine Learning, Qiangfei Xia et al., Nanotechnology, January 2021.
  • M. M. S. Aly, … H.-S. P. Wong, S. Mitra, “The N3XT Approach to Energy-Efficient Abundant-Data Computing,” invited paper, Proceedings of the IEEE, vol. 107, pp. 19 – 48 (2018)
  • H. -S. P. Wong, et al. "A Density Metric for Semiconductor Technology," Proceedings of the IEEE, vol. 108, no. 4, pp. 478-482, April 2020
  • H.-S. P. Wong, “The Future is System Integration,” invited keynote, DARPA ERI Summit (ERI Summit), Seattle, WA, August 18 – 20, 2020.  
  • H.-S. P. Wong, “Technology from 3D ICs to 3D System-on-a-Chip,” invited plenary paper, Design Automation Conference (DAC), San Francisco, July 20 – 22, 2020.  
  • H.-S. P. Wong, “IC Technology – What Will the Next Node Offer Us?” invited plenary paper, Hot Chips: A Symposium on High Performance Chips, Stanford, CA, August 18 – 20, 2019.  
  • "Intelligent Architectures for Intelligent Computing Systems"  
  • "A Modern Primer on Processing in Memory"   


Reference Videos

  • IEDM 2020 Tutorial: Memory-Centric Computing Systems, Onur Mutlu, 12 December 2020